This is an old revision of the document!
See the PCB footprints page.
The pcb manual contains a concise description of the user interface in the section "Getting Started".
As new features are added to the file format, older versions of pcb might choke on portions of the layout using the bright new features. To prevent this kind of misbehavior, the pcb file contains a note on the minimum version string for the binary. Older versions of pcb refuse to load a layout saved by a newer pcb binary. This was the case for the addition of holes in polygons in 2010. You need a pcb that was compiled from source later than June 2010 to open these layouts.
Unfortunately, there is no way to save the layout in a way that allows older versions of pcb to read the file. However, if don't use the holes in polygon features, you can just hand-edit the file version header back to 20070407 and open the file with the older pcb binary.
This topic is covered in the manual.
The auto pan feature was removed in September 2011. So install of a more current version might help.
If you use an older version of PCB, you can do this:
Probably you try to delete a selected object. In pcb the Delete button does not act on the selection, but on the object currently under the mouse. Consequently nothing will be deleted if an object is selected and the mouse hovers at some other place. Bottom line: Just position the mouse over an object and press the Delete button. No need to select the object.
However, you can delete the current selection with the Backspace key.
Most probably the object is locked. Locked objects won't highlight. To see, whether it indeed is, Select all connected objects from the Select menu. Locked footprints are shown with a little L at their diamond shaped insertion mark. Use the lock tool to unlock the object in question. Note, that the lock tool always toggles the lock state of the object you click at. Afterward, an object report pops up that contains the lock state in the last line.
If you want to remove all locks, you may consider to remove all instances of the string
lock in the *.pcb file with your favorite ascii editor.
A different reason for numb objects is “Only Names” in the settings menu. When checked, the selection tool will exclusively act on text. This is useful with crammed layouts. There is a complementary setting “Lock Names”, too.
Note: Square pads may not clear polygons correctly. Rectangular pads are ok, though. This is a known issue caused by the difficulty to know the reference direction of a square pad.
Note: For internal reasons, FreeRotateBuffer does not work with exact squares. As workaround use two or more polygons that add to give a square.
If both coordinates are prefixed with a “+”, or “-” the move is relative to the current position. Else the object is moved to absolute coordinates.
Use the command “MoveObject()” as described above.
You can alter the increase/decrease quantum using the File → Preferences… → Increments menu. (Note, this setting is currently broken)
There are two ways to do it:
The mouse is only sensitive to components on the active side of the board. This prevents ambiguities with components placed on both, top and bottom. By default, top side is active and the bottom side is the “far side” whose components are ignored by the mouse. You can swap the roles of the sides to make components on the far side accessible. The key-accels Tab, Shift+Tab, Ctrl+Tab and Ctrl+Shift+Tab will do the trick. These accels combine the swap with different vertical and horizontal flips. Specifically:
If the component is on the currently far side of the layout, its silk layer is drawn in grey. If unsure, deactivate the far side with the “far side” button, at the bottom of the layer button row. This should remove the silk of all far side components from the view.
Although only one silk layer button is visible in the GUI, silkscreen for both sides is automatically configured. In default view the silk layer button refers to silkscreen on the component side of the board. To place text or lines on solder silk you have to flip the board with the Tab key (or Shift+Tab if you prefer a left-right flip). This is like physically turning the board to the other side. It turns the solder layer on top, and component layer on bottom. Objects on component silk layer will be greyed out. If you draw to silk, lines will always go to the current top silk layer, which is solder now. The same happens to components and their silk screen. Flip the board again to return to default view.
Add it while the board is flipped (Tab). Just selecting the solder side is insufficient. New text always reads correctly from the side you're looking at.
Yes. You can use the command setvalue(grid,value,unit). To do this:
The absolute origin is always in the upper left corner of the accessible area. This cannot be set to some other place. However, coordinates of objects can also be given relative to the current grid. In the GTK2 version of pcb coordinates are shown in the upper right corner of the main window. The right pair is the absolute position, while the left pair reflects the position relative to an arbitrary marker. This marker is set to the current position of the mouse by the key sequence Ctrl+M. You may want to set the marker to a grid point or a specific pin.
Use Ctrl+M to set the origin and read the distance of the mouse pointer relative to this point on the upper right of the pcb window. Some objects like vias and tracks yield useful information in object reports. Access the report of the object currently under the mouse pointer with Ctrl+R.
In the netlist window, doubleclick on the specific rat name, then press O on your board window. Your rats are hidden for that net. In the Netlist window an asterisk appears in from of the rat name. To reverse: follow the same procedure.
While using the line tool, use the number keys on top of the keyboard to switch layers. A via will be placed automatically at the endpoint of the last complete segment.
There is a set of predefined sizes for routing. The sets bear suggestive names (Signal, Power, Fat and Skinny). Hit the button “Route Style” to configure the sizes of the current set to your needs. You can set the names and the default values of these parameter sets in a config file ( ~/.pcb/settings for the GTK-HID, or ~/.Xdefaults for the Lesstif-HID). Example for such a setting:
route-styles = Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600
Be sure, to remove any route-style line in ~/.pcb/preferences . Else, the line in settings will be ignored.
The line tool knows about different modes to deal with transversal connections. The status line on the bottom of the page tells, which mode is in effect:
The way to access these modes differs among the GUI versions. The current GTK snapshot (v20060288) defaults to “_/” but can be temporarily turned to “\_” with the Shift key. You can switch to 45° mode with the slash key /. For arbitrary angles, press the period key ., or choose 'All-direction' lines in the Setting menu.
The universal undo key U works even while in the middle of track layout actions. It will remove the last segment but keep the line tool attached to the mouse. So you can immediately go on routing and find a better way.
In pcb vias are covered by soldermask by default. You can achieve open vias by setting their clearance value to a proper value. This can be done individually for every object, or collectively for selections of objects.
For individual vias:
For groups of vias:
The command interface provides more control over the actual size of the clearance. Type : to get the command line window, then type:
<delta> is a size given in 1/100 of a mil. Thus the number 3000 corresponds to 30 mil. Simple integers for
<delta> will set the clearance to this value. If the value is preceded by a minus “-” or a plus “+” the clearance will be decreased or increased. This also works with
SelectedArcs or even
By default holes and pads will be cleared by an amount given in the corresponding footprint file. Sometimes this clearance might not be what your design needs. You can change the clearance on the fly for individual holes and pads just like vias. See the paragraph above for the details. If pad clearance is not compatible with the demands of your pcb-fab you may consider to make local copies of the footprint files and change the clearance accordingly.
There are a number of ways to change the size of already laid down tracks:
:ChangeSize(SelectedLines,+4,mils). The : key gets you to the command line and
ChangeSize()is the command version of the previously described action. Replace “
+4” by the amount you want to increase the track size. Use the minus sign to decrease the track size. If you omit the sign the command sets the track size to the value given.
A “thermal via” is not a via with a thermal relief. Rather, it's a via with no thermal relief punched into polygons on both sides of the board. These vias get filled with solder to help create a large thermal mass to be used as a heat sink. For more info, see Freescale App-Note AN4005.
Here are some suggestions:
You are likely drawing tracks with auto-DRC on. To connect the two segments, here are some suggestions:
This is a known weakness of the Auto-enforce-DRC mode. In this mode, the line tool will only allow you to connect to copper with the same net as the place where the track started.
There are two ways to connect to unconnected copper, anyway: Obviously, you can temporarily deactivate Auto enforce DRC clearance in the Settings menu. A second way uses the fact that auto-DRC relies on the found flag:
Unfortunately, older versions of PCB not only prevent you from placing overlapping vias but drop them on load. In December 2010 this overly cautious behavior was fixed. If you really need overlapping vias, you have to install a version of pcb younger than that.
The 2011 version of PCB still won't allow you to place vias so close that their holes overlap. However, it won't complain if you managed to work-around this restriction. E.g. place tiny vias and increase their size afterwards.
Most likely you named them such that PCB believes they are one part. Lower case letters at the end of a refdes are ignored. Thus, the components U2foo and U2bar both look like U2 to pcb. When building the rat nests pcb is will look for nets to U2 that, of course don't exist. Lower case letters are meant to differentiate slots of a multi-component. E.g. the four opamp symbols of a quad operational amplifier.
Bottom line: Don't use lower case letters at the end of a refdes, unless you know what you are doing.
You can set the color of the rats in File → Preferences… → Colors → Main colors
There is currently no GUI way to set the rat width, but you can edit your
$HOME/.pcb/preferences file manually. Close all instances of pcb and look for the line that starts with
Values 0..19 are fixed width in screen pixels. Anything larger means PCB units (i.e. 100 means “1 mil”). On zoom, PCB unit rats will scale accordingly.
Sometimes remaining rats are hard to see, because they have zero length. This will be the case if a via is missing for some reason. You can make them pop into your eye by setting the rat thickness to some big value e.g. 3000 mil. Rat thickness is set in
See the page http://www.delorie.com/pcb/bg-image.html at DJ Delorie's PCB HID website.
This is a great way to trace hand-drawn artwork or another PCB, say one you made in software with a proprietary format, which you'd now like to 'unlock'. Furthermore, you can use the background image as tool for making board revisions or redesigns.
If you don't like to use PCB confined to the area of the board, i.e. if you want margins around your board, then add them in the GIMP. I like to make a 1.00000 inch margin around the board. When you set your PCB size in PCB, you'll want to add the margin area. CTRL-M will help you verify the scaling. Also, the time to correct distortions from your scanner, or from your drawing is before you load it, in the GIMP or the like.
Question: I want to copy a section of my existing layout to another spot.
I can select the existing area. Everything turns pretty blue.
“Buffer” → “Copy Selection To Buffer” seems to succeed (no complaints).
Then I go to paste the copied area… and all that moves are a couple of traces and some vias. The pads I've painstakingly created aren't copied. What gives!?!?!?
Answer: If the silk layer is off, you can't copy elements through the paste buffer. Weird, but that's how it works. Therefore, turn on the silk layer before trying to copy a section of a layout.
Use rectangles and polygon planes. These items will always avoid vias, pads and pins. Tracks are also avoided, if they have the clear polygons flag set (menu: Settings → New lines, arcs clear polygons). Since version 20070208 of pcb the resulting polygon will be one contiguous piece. Isolated snippets are removed.
Polygons are not “assigned” to nets, they're connected to them. Pads are the only carriers of netnames in pcb. This means, you need to design some copper to connect the polygon with a pad. The net of the pad automatically transfers to the polygon.
There are different ways to adequately connect different types of objects to a polygon:
You didn't have New lines, arcs clear polygons checked in the Settings menu when you layed down the tracks. Enter
changejoin(selected) in the command window to toggle this flag for all tracks that are currently selected. The keyboard shortcut to this action is Shift+J.
If you want to set or clear the join flag rather than toggle it, you can use
SetFlag(selected, join) and
ClrFlag(selected, join). See
the SetFlag description in the pcb manual for more details on these commands.
In pcb, the polygon itself has no built-in clearance. It is the tracks, pads and pins that bear this property. This means, you can adjust the clearance individually:
Make sure, the soldermask layer is not active. Else the following will apply to the soldermask rather than to the polygon. Press K to increase the clearance of the object under the cursor. Use Ctrl+K to increase the clearance of selected objects. Add the Shift modifier to decrease the clearance. To change a whole track press F to find all segments that are connected to the object under the cursor and apply the action
The amount of the increment can be configured in the dialog File → Preferences… → Increments. (Note, this setting is currently ignored)
The above only applies to one object at a time. You can manipulate the clearance of all selected objects with the action
ChangeClearSize(Selected,<amount>,<unit>). The parameter
<amount> should be a number. A prefixed sign means increment, or decrement. A prefixed
= sets the clearance to the following value. The parameter can be
mm. If not specified the units will default to the internal unit of 0.01 mil.
In addition, there is a special action that acts only on objects with clearance below a given minimum:
Put the polygons (and rectangles) on a separate layer. Use the Preferences… dialog to make sure, this layer is not in the same group as the tracks. Disable the layer by a click on the corresponding layer button in the main window. After you are finished with the changes, use the Preferences… dialog to let the polygon layer join the layer of the tracks. You will have to save and reload the layout to trigger recalculation of polygons so they are adapted to your edits. Alternatively a restart will recalculate the polygons too.
Parts of the polygon that are not connected to some net are automatically eliminated. This effectively removes dead copper. While this is desirable for the actual board, it requires calculation of quite extensive algorithms. So it is not necessarily a bug, but a price to be paid for a powerful feature. Still, there is a couple of things you can do to improve the situation:
Polygon calculation is potentially an expensive operation in terms of processor cycles. Unless your layout is pretty complex, you most likely have redundant polygons defined. Look into the source of your layout to find and delete unnecessary polygons. If this does not apply, see above for possible measures to ameliorate the situation.
There are four basic ways to edit polygon outlines. You can move and delete vertices and you can insert vertices using two techniques. Polygons can be edited equally well in “thin line draw” mode (Settings → Thin draw poly) or in normal mode. Moving a vertex is easily accomplished by un-selecting your polygon and then clicking and dragging that vertex to a new location. To delete a vertex, a corner in your polygon, put your crosshairs over the point and hit Delete on the keyboard. To insert a vertex, you’ll use the insert tool (Insert keystroke). Start by clicking the edge you want to split with a new point. Click and drag a new point into the polygon. A variation on this technique is 1) click to select, followed by 2) click to place new vertex.
(NOTE: Inserting points into polygon will generally work ONLY with “all direction lines” enabled (Settings → 'All direction' lines). This is because PCB has a powerful 45/90 degree constraints system. If you try to insert new vertices into a polygon that don’t fall onto lines of proper 45 and 90 degree constraints, PCB disallows the action!)
Often it’s useful to have vias connect completely to a polygon (a field of copper) for heat transfer – the apparent problem is that PCB polygons have only a single “clear pins/vias” flag for the entire polygon (toggled by the S key). Our goal is to only connect some of the pins/vias to the polygon, but to connect them better than a thermal does. Here are a few ways to do this:
One way, you’ll make an object that’s almost just like a thermal in that it goes between your via and the polygon – the difference is that you’ll actually create an annulus to completely fill the space between the hole and polygon (which because it’s clearance is turned on, is not connected to the pin). This annulus is four arc segments. You can copy these four items to the buffer to create a “zero-clearance thermal tool”. The drawback of this trick is that when you change via size, you’ll also have to modify the size of these filler parts.
The arcs allow you to use this fill trick in tight places by only placing, say two of the four arcs.
Another trick is to make a zero-length line. Take a single line segment and move the end-point on top of the start-point. Now you have a “single point line” (a circle) with the diameter equal to the line thickness. Move to different layers (M key) as you see fit. Place this object centered on your via to connect it to a polygon.
Power-users may want to keep a small custom library of these parts by saving them as elements. It’s also handy to put these “parts” in one of your PCB buffers so they’re at your fingertips.
You can also add another polygon on-top of the polygon to which you want to connect you vias. You’ll un-set the “clear pins/vias” flag and the vias will be connected to the larger polygon underneath.
Currently, there is no way to directly make polygons clear solder mask. The usual workaround is to work with pads.
While the pad width is limited to 250 mil, clearance can be arbitrary.
This is a two step process. First select the objects you want to manipulate. Then act on the selection:
You may rip off the sub menu at the dashed line to make it stay on the screen for convenient repeated application.
Alternatively, issue the ChangeSize action with the command tool:
Replace SIZE with the desired size, given in 1/100 mil. 1mm = 3937. If SIZE is prefixed by “-” the size is decreased. If the prefix is “+”, the size is increased. If there is no sign, it is interpreted as an absolute value. Refer to the pcb manual for the syntax of the ChangeSize action.
Use a footprint for the mounting hole or place a via.
If the pads surrounding the mounting hole need to be electrically connected then you should show the connection in your schematic. Add a symbol for the mounting hole and change its footprint attribute.
My preference is to create PCB footprints for the various types of mounting hardware. I have a variety of silkscreens for various hardware combinations (hex nut, hex nut with washer, etc.) The silkscreen provides a convenient placement reference during PCB layout.
For footprint examples see http://www.luciani.org/geda/pcb/pcb-footprint-list.html#Hardware.
The reason is that pins usually have sufficient spacing that the plane surrounding them remains intact on all sides and pads usually are so tightly spaced that they do not. Because of this you must manually draw the thermal “fingers” to connect the pad to the ground plane. Be sure that you have the settings such that new lines connect to planes when you draw them. If you need to make several such thermals, spend a little time making the first one just the way you want then copy the fingers to the buffer and paste it where you want the others.
It's all just names when you're doing single sided. There's no such thing as a single sided board in pcb - just a double sided board with nothing on one side.
Design for two-sided, but with all the traces on the solder side. If you use the autorouter, turn off all but the bottom layer. This will make the autorouter stick to that layer. If you need wire jumpers, you have two options to let pcb know there is a valid connection: You can draw tracks on top layer similar to a two layer layout. Alternatively you can Create a “jumper” symbol in the schematic and put that in places where you need a jumper. This is likely to be a major pain, but you can enforce dimensions of the jumpers this way if you care.
Single sided boards do not have plated holes, so pad diameter for pins must be greater, usually two to three times the drill size. Some footprints in the default library have very small pads which will be too weak if used for single sided board. Tweak them to your needs and place them in a local library.
When you dump your gerbers, delete the component side one and rename the plated-holes one to unplated-holes. Voila! A single sided board.
One of PCB's great features is that it uses an easily understood ASCII file format. Therefore, many people use scripts (commonly Perl) to process their boards in various ways. You can use these scripts either as they are, or modify them to suit your own goals. Here are some links to available scripts:
There is a third party open source utility called pstoedit that converts postscript data to pcb format. It is included in most major Linux distributions. You can use your favorite vector graphics utility to produce a logo or any kind of fancy layout. Export as eps if you can and make sure that your logo fits into the bounding box (check with a postscript viewer such as ggv). If there is no eps export available, you can produce postscript by printing to a file. In this case you may add a bounding box with ps2epsi. Call pstoedit with the option “
-f pcb” to produce a valid pcb file that contains the graphics as tracks on layer 1. Load this file to pcb. The graphics will sit somewhere on the lower left of the view port. You may have to zoom out to get it on the screen.
Import of external vector graphics is useful if an irregular shape of the pcb is required. Use the cut buffer to copy the shape to your actual design.
There is no import filter to directly load a DXF file to pcb. However, the open source application qcad can open DXF files and export them as postscript. The tool pstoedit can turn this postscript file into a format readable by pcb (see above).
Sometimes footprints call for shapes that are difficult to achieve with the restricted graphics GUI of pcb. It may be easier to start with the vector drawing application inkscape and convert to pcb. In inkscape:
Convert to pcb format:
In pcb do:
In a text editor:
You can set the name of the current pcb with menu Edit → Edit name of → layout. This sets the title attribute of the layout. This attribute is used for the export actions. It does not interfere with the file name.
The GUI provides no way to do similar subcircuits automatically. You can copy groups of tracks and vias. However, you have to place the footprints manually. Deactivate Auto enforce DRC clearance in the Settings menu during placement. Else pcb won't let you connect the footprints with the copied tracks and vias.
John Luciani wrote a pair of perl scripts that can do better than that. The script sch-matrix places multiple copies of a basic block on the sheet. It increments the numbers and positions of the symbols as needed. The layout script pcb-matrix arranges multiple copies of a sample layout in a matrix way. The result is a matching pair of schematic and layout with a subcircuit repeated multiple times. See Johns website for the details and a download of the scripts.
The pair of scripts was written a few years ago and is not used regularly. They may need to be updated when used with recent versions of pcb. Contribution of bug reports and/or patches are welcome.
There is a special option to put a bitmap graphic in the background of the canvas. The image can be in jpg, png, or ppm format. Use gimp, or any other image manipulation program to make the image look hazy so it does not interfere too much with the actual layout colors. Call PCB like this:
$ pcb --bg-image background.png layout.pcb
The image will be scaled to the size of the canvas. See the howto page by DJ Delorie for a screenshot of pcb with background image.
Note on disabled nets: If you will be manually routing these later not using planes, it is usually better to let the autorouter route them then rip them up yourself afterwards. If you plan to use a ground/power plane manually, consider making it from one or more pure rectangles and letting the autorouter have a go at it.
If you really want to muck with the router because you have a special design, e.g. all through-hole components you can mess with layer directional costs by editing the autoroute.c source file and changing the directional costs in lines 929-940 and try again. Even more mucking about with costs is possible in lines 4540-4569, but it's probably not such a good idea unless you really just want to experiment.
Just unselect the layers you don’t want (usually green and blue) by clicking on the name of the layer, then press autoroute.
Open up the netlist window. It has options for including or excluding nets from the ratlist. If you use the GTK-HID double-click a route to disable it. Make sure, only the nets you want are enabled. Optimize the rats with key O. Do Auto-route all rats.
You can have the autorouter work only within a given area by drawing a copper polygon conforming to your board’s boundary and placing it in each layer you’re trying to autoroute. You can also use this trick to autoroute only with small areas. Of course, if you accidentally have a net touching the polygon, all routes will get shorted to that net.
Connect the polygon that will become your power planes to a net and the autorouter will figure it all out. You may need some trick polygon clearances to get power routing and routing within a board outline.
This is a technological limitation of the current auto router. It is gridless and uses geometric rectangles only.
Have you tried the various clean-up tools under Connects → Optimize routed tracks?
Yes, you can tell pcb on the command line to do an export. All the parameters set in the print dialog can be used in the command line too. Some simple examples:
pcb -x gerber --gerberfile BOARD BOARD.pcb
pcb -x eps --eps-file BOARD.eps
Multi page formated Postscript print:
pcb -x ps --psfile BOARD.ps BOARD.pcb
pcb -x png --dpi 300 --only-visible --outfile BOARD.png BOARD.pcb
Different output procedures allow for different options. See the output of
pcb --help for details.
In the GUI:
From the command line:
pcb -x eps \ --layer-stack "outline,top,silk" \ --as-shown \ --eps-file "foobar.eps" BOARD.pcb
The layer-stack string can contain a comma separated list of the layers used in the GUI. You have to give the option “--as-shown”. Else, a default layer stack file will be used. In addition there are a number of tokens that are technically no layers like “pins”, or “invisible”. If you put an unknown token in the layer-stack string, pcb responds with a list of known layer names.
From the command line: Add “solderside” to the layer-stack string of the print command. Example:
pcb -x eps --layer-stack "silk,solderside" \ --as-shown \ --eps-file "/tmp/foobar.eps" BOARD.pcb
PCB interprets the lines in a layer called ‘outline’ as the absolute edge of the pcb. If no such layer is present, you can either rename a layer (Edit → Edit name of → active layer). Or you can add a layer from scratch (File → Preferences… → Layers →
Add) and rename it accordingly. Note, that the name of this layer is case sensitive.
You can enter your outline thru PCB’s GUI. You just draw the desired outline with the line tool or the arc too. Most fabs will cut the board at the center of the lines. You can generate boards of any shape this way. Arcs, polygons and text in the outline layer also enter the gerber file.
It’s also possible to edit the native .pcb file format of your layout. I usually use layer 8 for outlines:
Layer(8 "outline") ( Line[x1 y1 x2 y2 1000 2000 0x00000000] Line[x2 y2 x3 y3 1000 2000 0x00000000] Line[x3 y3 x4 y4 1000 2000 0x00000000] Line[x4 y4 x1 y1 1000 2000 0x00000000] Line[<more points go here for non-square boards> 1000 2000 0x00000000] )
PCB will produce a gerber file called $NAME.outline.gbr that exclusively contains the objects in the outline layer.
Some fabs provide lists of standard drill sizes and charge extra if the design contains additional sizes. You can put this list in a “vendor resource file”. This file may also exceptions and specify if the nearest diameter should be chosen, or rounded up to the next size in the list. See the section Vendor-drill-mapping in the pcb manual for the syntax of this file.
Load the file to pcb with File → Load vendor resource file. Alternatively, you can use with the command
:LoadVendor(drillfile). Substitute “drillfile” with the name of your file.
On load, pcb will substitute drill sizes so that the layout conforms to the list. If you want to apply an already loaded vendor resource file again, you can do Apply vendor drill mapping from the Connects menu.
Some board houses ask for the number of SMD pads to help them with their quote. You can use gerbv to extract this pad count from your layout.
Besides running the DRC checker, it is essential to check your Gerber files. The gEDA Suite includes the program “gerbv” for this task. Here are some things to check/verify:
It limits the size of the image to NxN pixels, but maintains the aspect ratio. For example, if you set it to 400, a 6000×8000 mil board would yield a 300×400 image, but a 6000×4500 board yields a 400×300 image.
In GTK-HID there is a Preferences… dialog in the File menu. The Colors tab presents a convenient way to set all the colors pcb uses via the standard GTK color chooser. The colors are saved to $HOME/.pcb/preferences on shut down of the application.
With Lesstif-HID there is no preference dialog. Colors can be set in
You can set the default options of the postscript printing dialog as command line parameters when invoking pcb. Type
pcb --help for a list of available options. These options can also be set in a file
$HOME/.pcb/settings. A settings file for a4 paper, no alignment marks, multi page output would contain:
media = A4 align-marks = 0 multi-file = 1
There is no GUI way to modify the mouse behavior. However, you can adapt it to your needs without recompiling. This is how:
gpcb-menu.reson your box. For lesstif there is a similar file called
The GTK version of pcb includes a neat way to change shortcuts on the fly:
This setting will be reset at the next session of pcb.
Default keyboard shortcuts are defined in files called
gpcb-menu.res if you use the default GTK interface. On start-up pcb reads the configuration from a system path, e.g.
/usr/share/. For permanent change of keyboard shortcuts you can copy the system file to
$HOME/.pcb/gpcb-menu.res and edit to your needs. Settings in this file will overwrite the system configuration.
The lesstif interface reads
pcb-menu.res files instead.
The menu is defined in
gpcb-menu.res for the GTK-UI. You can place a localized copy in
$HOME/.pcb/. See the notes above on configuration of keyboard shortcuts and mouse behavior.
You can get fast responses from the geda-user email list. If you haven’t found an answer to your question about PCB on this page, or in the other documentation, then post to the list! Note that you must subscribe to the geda-user e-mail list before you can post to the list. The gEDA e-mail lists, and their archives, are at: http://wiki.geda-project.org/geda:mailinglists.