gEDA Project Wiki

• Line/arc/silk width is too thin
• Pin/via annular ring too small
• Pin/via drill size too small
• Pad too thin
• Silk lines in elements
• No paste
• Insufficient copper overlap
• Insufficient copper spacing
• Hole too close to line/pad/pin/via
• Hole touches arc
• Insufficient clearance inside polygon

Presently, the violations are identified in find.c, and then appended to a list in the gtk hid. In the lesstif and batch hids, you get a pop-up window or a text prompt that describes the error.

Executing the DRC() action will wipe out the selected, found, and DRC flags on most objects, although, apparently not elements.

1. Execute the DRC() action.
2. Generate the “DRC doesn't catch everything” warning.
3. Save layer state and turn on all layers.
4. Clear the FOUNDFLAG, DRCFLAG, and SELECTEDFLAG on all objects. DRC uses these flags to find errors.
5. InitConnectionLookup – This resets all of the lists that are used for building the connectivity map.
6. For every element pin, pad, and via, execute DRCFind. DRCFind builds a connection list starting from the given pin/pad/via four times. See below for a more detailed description of that process (if I get around to writing it).
   1. Apply a global bloat of value “Shrink”, and build a connection list, with global drc set to false. This will set the DRCFLAG and SELECTEDFLAG on every object that is touching the given pin/pad/via.
   2. Apply a global bloat of value 0, and build a connection list with global “drc” set to true.