geda:hierarchy
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geda:hierarchy [2015/03/28 14:51] rlutz Create page (net namespace part still missing) |
geda:hierarchy [2016/02/29 09:10] rlutz start writing section on netname=/net= mangling |
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| + | //(This page is still incomplete.)// | ||
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| ====== Hierarchical schematics ====== | ====== Hierarchical schematics ====== | ||
| - | Depending on what you want to achieve, there are several options how to use hierarchy. If you are unsure, ask yourself if you want to instantiate a schematic multiple times, or want to represent a subsheet as a symbol in another sheet. If yes, go with full mangling. If not, you probably don't need hierarchy at all and can just use multiple schematic files. | + | Depending on what you want to achieve, there are several options how to use hierarchy. If you are unsure, ask yourself if you want to include a subcircuit multiple times in your design, or want to represent a subsheet as a symbol in another sheet. If you answer either with yes, go with full mangling. If not, you probably don't need hierarchy at all and can just use multiple schematic files. |
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| + | <note> | ||
| + | The schematic hierarchy isn't limited to one level—subcircuits can in turn contain other subcircuits. | ||
| + | </note> | ||
| ===== Multiple schematic files ===== | ===== Multiple schematic files ===== | ||
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| $ gnetlist -g geda page-one.sch page-two.sch | $ gnetlist -g geda page-one.sch page-two.sch | ||
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| + | If you are using the same ''netname='' attribute on different pages, the nets will automatically be connected. | ||
| ===== Hierarchy as a convenience method ===== | ===== Hierarchy as a convenience method ===== | ||
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| $ gnetlist -g geda main.sch | $ gnetlist -g geda main.sch | ||
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| + | <note> | ||
| + | This will only work if the [[geda:gaf_utility#gaf_config|configuration]] setting ''[[geda:gaf_utility#gnetlist_group|gnetlist.traverse-hierarchy]]'' is set to ''true''. This is the default but may have been overridden by your distribution or local administrator. | ||
| + | </note> | ||
| <note important> | <note important> | ||
| ''gnetlist'' will complain if the subsheet symbols don't contain a ''refdes='' attribute, but with mangling disabled, it won't use it in any way. | ''gnetlist'' will complain if the subsheet symbols don't contain a ''refdes='' attribute, but with mangling disabled, it won't use it in any way. | ||
| </note> | </note> | ||
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| + | In ''gschem'', you can navigate the schematic hierarchy using the commands from the “Hierarchy” menu. To view the underlying schematic for a subcircuit component, select it and use **Hierarchy→Down Schematic**. Once finished editing, use **Hierarchy→Up** to return to the original schematic. (This works only if you accessed the subcircuit's schematic in that way.) Analogously, you can edit the subcircuit symbol itself using **Hierarchy→Down Symbol**. | ||
| ==== Input/output pins ==== | ==== Input/output pins ==== | ||
| - | Without a hierarchy, the only way to route nets from one schematic page to another one is by specifying the same net name. With hierarchy, there is another, visually cleaner way: you can add pins to the subsheet symbol and route the inter-subsheet nets on the main schematic. For each pin, you need to add a footprint-less I/O symbol to the subsheet whose ''refdes='' matches the ''pinlabel='' of the corresponding pin. | + | As an alternative to using the same net name, you can add pins to a subsheet symbol to route nets to and from that schematic. For each pin on the symbol, you need to add a corresponding footprint-less I/O symbol to the subsheet whose ''refdes='' matches the ''pinlabel='' of the pin. (You can normally use the ''in-1.sym'' and ''out-1.sym'' symbols from the generic “Input/Output” symbol library for this.) |
| <note important> | <note important> | ||
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| </note> | </note> | ||
| - | ===== Hierarchy as a grouping/instantiating mechanism ===== | + | ===== Hierarchy as a grouping/instantiation mechanism ===== |
| - | If you want to instantiate a subsheet more than once, you need a way to tell the components of one instantiation from that of another one (given that your subsheet contains any components). This is where uref mangling comes in. You enable it by specifying | + | If you want to include a subcircuit multiple times in your schematic, you need a way to tell the components of one instantiation from those of another one (given that your subcircuit contains any components). This is where uref mangling comes in. You enable it by specifying |
| (hierarchy-uref-mangle "enabled") | (hierarchy-uref-mangle "enabled") | ||
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| (hierarchy-uref-separator ":") | (hierarchy-uref-separator ":") | ||
| - | Please note that nets with equal names will still connect. You will have to separate net namespaces to avoid that. | + | <note important> |
| + | Named nets from one instantiation will connect to the same net of another one. If you are using net names in the subcircuit, you will probably want to use separate net namespaces to avoid that. | ||
| + | </note> | ||
| ===== Separating net=/netname= namespaces ===== | ===== Separating net=/netname= namespaces ===== | ||
| - | … | + | The typical and cleanest way to use hierarchy is to enable both refdes and net=/netname= mangling. This means that the subcircuit lives in a namespace of its own, and the only way to connect nets between the instantiating and the instantiated schematic is through pins of the subsheet symbol and I/O ports in its schematic. If you want to include a subcircuit multiple times in your design, even though it's not strictly necessary, this is the recommended way to use hierarchy, as you would otherwise have to be very careful about avoiding naming nets in the subschematic which would cause them to be silently short-circuited between instantiations. |
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| + | ==== netname= mangling vs. net= mangling ==== | ||
| + | |||
| + | There are two slightly different options which influence net namespaces: ''netname='' mangling means that net names set via the ''netname='' attribute on nets are prefixed or suffixed with the subsheet instance's hierarchy tag. ''net='' attribute mangling means that net names which are set via the ''net='' attribute on components (like, for example, ''Vcc'' and ''GND'' pins in some libraries) are prefixed or suffixed with the subsheet instance's hierarchy tag. | ||
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| + | Usually, when using net namespaces, you would enable both ''netname='' and ''net='' mangling. Depending on how you use hierarchy in your design, there might be use cases where you might want to disable one of them, though: If you disable ''netname='' mangling, you gain the ability to use global net names and connect nets across the hierarchy by setting the ''netname='' attribute while still having implicit nets separate. If you disable ''net='' mangling, all implicit pins (usually power and ground pins) across all of your schematic pages will be connected, so you don't have to use explicit power and ground pins on your subsheet symbols. Both approaches come at the cost of reduced readability, though: you can't tell any more how a subsheet is connected to the rest of the design by just looking at the schematic. | ||
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geda/hierarchy.txt · Last modified: 2016/02/29 09:42 by rlutz
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