Table of Contents
Sitemap
General
Documentation
Utilities
gnetlist backends
Icarus Verilog
Development
PCB development
Improvements/planned features/ideas
Wishlist
Google Summer of Code
Placeholder and redirection pages
Related projects
Sitemap
General
Main page
(
es
fr
ru
)
Screenshots
Projects created using gEDA
Download
(
ru
)
Installing gEDA
(
fr
ru
)
Installing gEDA/gaf on Windows – the Cygwin way
(
ru
)
Installing gEDA on Fedora
(
ru
)
gEDA installer for Fedora Core 1
gEDA installer for Fedora Core 2
gEDA installer for Fedora Core 3
gEDA installer for Fedora Core 4
Installing gEDA rpm packages on SuSE
(
ru
)
Installer for SuSE 9.3
Installer for SuSE 10.0
Installer for SuSE 10.1
Installing on Ubuntu
Running gEDA on the mac
(
ru
)
Old (2007) Debian installer
(
fr
ru
)
Building gEDA/gaf from git repository
Building PCB from git repository
Reporting bugs
(
nl
ru
)
Mailing lists
(
ru
)
GPL exemption clause for symbols
FAQ
(
fr
ru
)
Links
How to contribute
(
ru
)
DokuWiki Syntax
Installed plugins
About DokuWiki
DokuWiki features
Playground
Using vim to edit gEDA wiki pages
(
ru
)
Generating PDF documentation from the wiki (work in progress)
Developers
GNU Free Documentation License
Sitemap
Documentation
gEDA documentation
(
ru
)
List of gEDA programs, utilities and libraries
gEDA gschem User Guide
(
ru
)
Introduction
(
ru
)
Running gschem
(
ru
)
The main window
(
ru
)
Schematic and symbol pages
(
ru
)
Viewing schematics
(
ru
)
Editing actions
(
ru
)
Selecting objects
(
ru
)
Grids
(
ru
)
Moving and copying
(
ru
)
Components
(
ru
)
Pins, nets and buses
(
ru
)
Graphics
(
ru
)
Colors and styles
(
ru
)
Attributes
(
ru
)
Slots and slotting
(
ru
)
Autonumbering
(
ru
)
Hierarchy
(
ru
)
Printing
(
ru
)
Exporting images
(
ru
)
Configuring gschem
(
ru
)
Appendix:
Command-line arguments
(
ru
)
Appendix:
Mouse gesture support
(
ru
)
Appendix:
Extending gschem
(
ru
)
gEDA gnetlist User Guide
(
ru
)
Introduction
(
ru
)
Running gnetlist
(
ru
)
Input and output files
(
ru
)
Netlist backends
(
ru
)
Basic netlisting
(
ru
)
Hierarchy
(
ru
)
Slots and slotting
(
ru
)
Implicit pins
(
ru
)
Configuring gnetlist
(
ru
)
Appendix:
Command-line arguments
(
ru
)
HOWTO: Circuit Simulation using gEDA and SPICE
(
ru
)
Using hierarchical spice models
(
ru
)
Example of a USB-based JTAG interface
(
ru
)
FAQ: Attribute management
(
fr
ru
)
FAQ: gnetlist
(
fr
ru
)
FAQ: gsch2pcb
(
fr
ru
)
FAQ: gschem
(
fr
ru
)
FAQ: pcb
(
ru
)
FAQ: simulation
(
fr
ru
)
Forward/Backward Annotation between gEDA/gaf and PADS PowerPCB
gEDA schematic/symbol file format
(
ru
)
gEDA/gaf attribute reference
(
ru
)
gerbv
(
ru
)
gerbv: Searching for parts and marking them on screen
Glossary
(
fr
ru
)
HOWTO: Scripting a gnetlist backend in Scheme
(
ru
)
gnetlist Scheme primitives
Driving RF Cascade simulations from gEDA/gaf
gsch2pcb
Tutorial: gschem -> gsch2pcb -> PCB
(
ru
)
Release Notes for gsch2pcb Tutorial
(
ru
)
Tutorial/HOWTO: gEDA/gaf Symbol Creation
(
ru
)
Tutorial: gschem Warmup for Beginners
(
ru
)
Guile scripting
(
ru
)
gschem hooks
“net=” attribute mini-HOWTO
(
ru
)
Using gschem with ngspice
(
ru
)
ngspice
PCB Quick Reference
(
fr
ru
)
PCB footprint naming conventions
(
ru
)
PCB footprints
(
ru
)
PCB footprint generators
PCB manpage
PCB tips
(
fr
ru
)
Driving SWITCAP simulations using gEDA/gaf: README
Driving SWITCAP simulations from gEDA/gaf: HOWTO
Spice POLY constructs
(
ru
)
HOWTO/Tutorial: Creating gschem symbols using tragesym and a spreadsheet program
(
fr
ru
)
Transistor Guide: gschem symbols and PCB elements
(
ru
)
Learning how to use gEDA
(
fr
ru
)
Hierarchical schematics
How to add a ground plane in PCB
Guile REPL in gschem
(
ru
)
Symbol guide
Getting started with Xorn
Utilities
gEDA tools
empty
“gaf” command-line utility
(
ru
)
gattrib
grenum – An advanced refdes renumber utility
gsymcheck – gEDA/gaf Symbol Checker
(
ru
)
mstrip – JavaScript based microstrip analysis/synthesis calculator
(
ru
)
ngnutmeg – spice post-processor
sconvert – convert spice formats
olib2geda – converter from OrCAD v4 parts library to gEDA symbol definition
tragesym – create geda symbols out of structured textfiles
(
ru
)
translate2geda – convert symbols, footprints and schematics to gEDA compatible formats
List of symbol generators
wcalc – Transmission line analysis/synthesis calculator (manpage)
wcalc – Transmission line analysis/synthesis calculator (README)
wcalc – Transmission line analysis/synthesis calculator (stdio-wcalc manpage)
gnetlist backends
Bill of Materials generator (gnetlist backend “bom”)
(
ru
)
gnetlist backend “eagle”, sch2eaglepos.sh
(
ru
)
“systemc” gnetlist backend
VHDL-AMS (VHDL Analog and Mixed-Signal) netlist generation
Verilog netlister
VHDL netlister
Icarus Verilog
Icarus Verilog
Icarus Attribute Naming Conventions
Icarus Verilog Extensions
Icarus Verilog Glossary
Icarus Verilog vs. IEEE1364
iverilog – Icarus Verilog compiler
Executable Instruction Opcodes
Getting Started with Icarus Verilog
The Icarus Verilog Compilation System
iverilog-vpi – Compile front end for VPI modules
VPI within VVP
vvp – Icarus Verilog vvp runtime engine
VVP Simulation Engine
Xilinx Hints
Xilinx Netlist Format
FPGA Loadable Code Generator for Icarus Verilog
Development
gEDA Developer Information
(
ru
)
gEDA developer tips, tricks and hints
(
ru
)
Triaging bugs and feature requests
(
nl
ru
)
Creating a new gEDA/gaf release
git
(
ru
)
Version control migration
User experiences with the gEDA suite
PCB development
Introduction
Getting Started as a Developer (short introduction)
Tracing an action down into the source code
Adding a core action
Data structures
Fonts
Registering actions, flags, and attributes
Source tree file structure
Connection lookup
DRC
Tests
Plugins
Unit tests
HIDs
almost empty
Padstacks
empty
Snapping (development draft)
Crosshair (development draft)
almost empty
Improvements/planned features/ideas
Clipboard Support
(targetted for release in gEDA 1.8.0)
Forward Annotation
Ideas for GUI Enhancement
Improving circuit simulation in gschem
(
ru
)
Improving data plotting
(
ru
)
Discussion about data structure design
gEDA design flow and hierarchy roadmap
Universal file format translator
(
ru
)
Improving PCB's usability: Statement of work
PCB layers
XML file formats
Thoughts about libgeda3
Thoughts about libgeda3 – object based design
PCB releases and roadmap
(
ru
)
gparts: Parts Manager
Design document: design and architecture
Implementation details
Component classification
Building from source
User guide
Wishlist
Wishlist: gEDA todos
(
ru
)
Wishlist: General, “glue” projects
Wishlist: gschem projects
Wishlist: PCB projects
(
ru
)
Wishlist: gerbv projects
Wishlist: GTKWave projects
Wishlist: Gwave projects
Google Summer of Code 2007: List of suggested projects
Google Summer of Code 2008: List of suggested projects
Google Summer of Code 2009: List of suggested projects
Google Summer of Code 2010: List of suggested projects
Google Summer of Code
Google Summer of Code 2007: General information
Google Summer of Code 2008: General information
Google Summer of Code 2009: General information
Google Summer of Code 2010: General information
Google Summer of Code Best Practices
Placeholder and redirection pages
geda:start
(
ru
)
geda:gedasuite_installation
(moved on 2014/04/14)
geda:sdb_howto
(moved on 2012/02/20 or earlier)
geda:spice_improvements
(moved on 2012/02/20 or earlier)
Related projects
Man page for covered(1)
(
Home page
,
User guide
)